The final chip layout sent to TSMC is represented as a bitmap-like GDS2 file that specifies the placement of metal layers and individual transistors.

“There's literally a kind of bitmap, you know, we have this file type you call GDS2,”

“and it's literally,”

“you know, where do I put the metal layers?”

“Where do I put each individual transistor?”

“And so it's a full layout.”