In chip design, conventional algorithms face fundamental wall-clock bottlenecks, and models will generate many reasoning tokens before placing a circuit.

“about the results of that AI experiment because the experiment in the middle is pretty expensive and takes a certain amount of wall clock time and so I think you get there also with things like chip design where there are these kind of fundamental wall clock time bottlenecks for the more conventional algorithms we're going to be generating a lot of reasoning tokens before we go and place a given circuit.”